OK, that's what I thought. K3 is linked to P48 control. That's cool.hazmo wrote:The plan for K3 was that it will always be pre/post delayed to the switching of P48 until the caps are discharged/before they are charged, so that there will never be any current through the relay. K3 will always be active whenever P48 is not on, not controllable by the user.
How many discharge time constants do you suppose you'll wait before turning K3 on? You might want to "back" ground the 6K81s when P48 is off to speed that up. (Type A).
The 100K+6K81 that's shared (~214k) for discharging the 47 uF x2 has a tau of around 20 seconds. At one TC Cin still have 37% of whatever the P48 started at. If the input was unloaded and P48 was 48V, then that's about 18V. With a modest ESR cap I think you'll see some fairly high peak currents unless you want to wait quite awhile to shunt it.
If the 6K81s were grounded when off (Type A), then the tau would be about 640 ms. At 5 TC, ~1% of P48 is 0.5V across Cin. K3's contact current, or the wait time, would be a lot less maybe 2-3 seconds. You might want to think about that.
BTW, if you open K3 but leave P48 off, you'll be amazed at how much stored charge (in the form of DA) comes back at you after Cin has been shorted. With aluminum electrolytics it can easily approach 4-5V after 15 minutes. This will probably never be an operating condition but the effect of DA on DC conditions deserves some additional exploration.
The output circuit relies on subtraction using inversion of the non-inverting output summed via the "ground" connection to the input reference resistor. As the delay in the inverter increases relative to differential stage, subtraction does not occur immediately and is delayed causing squarewave overshoot with real op amps. Although it does not sim that way, without compensation it will also oscillate. Here's the ADI/Jung cite of Birt's line receiver using the same topology:hazmo wrote:Good point with the unity gain. Though you could still get unity or less by engaging the pad. Ah, I see you were saying "true". I just simulated the output stage to find good values for the resistors. I couldn't get it to overshoot though, only really small ripple even without any compensation.
Here's an example of the overshoot with small, ~20 pF, caps for the inverter and differential amp typical of the schematic above built with 5532/2114s. (Note that the above sch doesn't have any caps in the diff amp shunting R2 and R4 which make it slightly worse than the image below.)
Birt_Output_Inverter_Output_20kHz_1.JPG
I think you could trick the simulator into producing real-world overshoot by making the inverter's Cc very large. It may sim well with no Cc or small values of differential Cc but trust me, with the differential amp as fast, or faster than the inverter, it overshoots by a bodacious amount when probed by an oscilloscope. Also when looking at the output look not only at the CM output (each relative to ground) but the differential one. I tuned the Cc values to the differential component and got lucky with the CM.
If you tune the differential amp to make it slower than the inverter you can clean the squarewave response up. I'm not sure I have photos of the basic output (these are for an A/D driver with Cload tolerance based on the same circuit) but this is about what you can get approximately:
A-D_Driver_Birt-Hebert_Full_Symmetry_Differential_20kHz.JPG. The above is the 20 kHz differential output response.
A-D_Driver_Birt-Hebert_Full_Symmetry_Out+_vs_Out-_20kHz.JPG. This is the + and - outputs relative to ground. Note the significant reduction in overshoot compared to the "stock" Birt circuit.