THAT 1570 1510 and 1512 Input/Output Circuits

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mediatechnology
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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by mediatechnology »

hazmo wrote:The plan for K3 was that it will always be pre/post delayed to the switching of P48 until the caps are discharged/before they are charged, so that there will never be any current through the relay. K3 will always be active whenever P48 is not on, not controllable by the user.
OK, that's what I thought. K3 is linked to P48 control. That's cool.

How many discharge time constants do you suppose you'll wait before turning K3 on? You might want to "back" ground the 6K81s when P48 is off to speed that up. (Type A).

The 100K+6K81 that's shared (~214k) for discharging the 47 uF x2 has a tau of around 20 seconds. At one TC Cin still have 37% of whatever the P48 started at. If the input was unloaded and P48 was 48V, then that's about 18V. With a modest ESR cap I think you'll see some fairly high peak currents unless you want to wait quite awhile to shunt it.

If the 6K81s were grounded when off (Type A), then the tau would be about 640 ms. At 5 TC, ~1% of P48 is 0.5V across Cin. K3's contact current, or the wait time, would be a lot less maybe 2-3 seconds. You might want to think about that.

BTW, if you open K3 but leave P48 off, you'll be amazed at how much stored charge (in the form of DA) comes back at you after Cin has been shorted. With aluminum electrolytics it can easily approach 4-5V after 15 minutes. This will probably never be an operating condition but the effect of DA on DC conditions deserves some additional exploration.
hazmo wrote:Good point with the unity gain. Though you could still get unity or less by engaging the pad. Ah, I see you were saying "true". I just simulated the output stage to find good values for the resistors. I couldn't get it to overshoot though, only really small ripple even without any compensation.
The output circuit relies on subtraction using inversion of the non-inverting output summed via the "ground" connection to the input reference resistor. As the delay in the inverter increases relative to differential stage, subtraction does not occur immediately and is delayed causing squarewave overshoot with real op amps. Although it does not sim that way, without compensation it will also oscillate. Here's the ADI/Jung cite of Birt's line receiver using the same topology:

Image

Here's an example of the overshoot with small, ~20 pF, caps for the inverter and differential amp typical of the schematic above built with 5532/2114s. (Note that the above sch doesn't have any caps in the diff amp shunting R2 and R4 which make it slightly worse than the image below.)

Image
Birt_Output_Inverter_Output_20kHz_1.JPG

I think you could trick the simulator into producing real-world overshoot by making the inverter's Cc very large. It may sim well with no Cc or small values of differential Cc but trust me, with the differential amp as fast, or faster than the inverter, it overshoots by a bodacious amount when probed by an oscilloscope. Also when looking at the output look not only at the CM output (each relative to ground) but the differential one. I tuned the Cc values to the differential component and got lucky with the CM.

If you tune the differential amp to make it slower than the inverter you can clean the squarewave response up. I'm not sure I have photos of the basic output (these are for an A/D driver with Cload tolerance based on the same circuit) but this is about what you can get approximately:

Image
A-D_Driver_Birt-Hebert_Full_Symmetry_Differential_20kHz.JPG. The above is the 20 kHz differential output response.

Image
A-D_Driver_Birt-Hebert_Full_Symmetry_Out+_vs_Out-_20kHz.JPG. This is the + and - outputs relative to ground. Note the significant reduction in overshoot compared to the "stock" Birt circuit.
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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by hazmo »

Thanks Wayne, great info! I tried to make the inverter fairly slower, but still no "success" ;).
Anyway, it's not that I didn't believe you, just wanted to see it myself. So thanks for the pictures!


Actually, I didn't even think too much about the time constants yet, but you're right. Should
have seen in the first place that it won't be really practical without shunting the 6,8ks to ground.
And so the MOS relays are back in the game, with that additional switching any transistorized
version gets too bloated. The PS7141 would be a good candidate with the complementary
switches, but Digikey says it's not recommended for new designs. Functionally similar is the
LCC110, and looks pretty good.
But I'll look further when I finally get around to do a pcb design, who knows what is available then. :lol:


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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by mediatechnology »

The PS7113-2 is a dual you might consider. Mouser stock them.

You can have one LED tied to the 3V3 line and the other one tied to ground (both using limiting resistors of course) to use a single logic line to make a SPDT switch. That way you can get the compliment using only one logic line. (Just make sure the driver doesn't tri-state or they'll both turn on. :oops: )

The 74LV125 (3V3) makes a good buffer with ample current to drive the LEDs. I wouldn't use the GPO output directly.
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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by JR. »

Sorry to jump into the tail end of a conversation.

Image

+1 to the suggestion to add LPF caps across R2 and R4. These caps need to be same value and similar precision to Rs for HF CMR, while 1% caps are surely rare.

R7 is only useful for compensating nominal DC offsets with old school bipolar opamps that had significant input bias current (dating that schematic). Modern bipolar opamps with bias current cancellation, or FET inputs with << bias current, receive no benefit so you can lose the extra noise source, however modest.

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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by mediatechnology »

Thanks John.

A couple of other points:

There is no 49R9 in the -Vout leg on the ADI drawing.

The junction of R7 and the non-inverting input is a convenient point to inject a Vcm. This is handy when the circuit is made attenuating and (Cload tolerant) for A/D driving.

BTW the noise contribution of U2 is almost "free" being that it essentially appears in common mode at the outputs. If the following stage is differnetial and has good CMR U2s noise contribution is very small.
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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by JR. »

I pretty much ignored the 49 ohm R since I never found much use for a balanced input to differential output circuit. I typically used that topology to single end a balanced feed coming into a console or rack gear, and since it would be lightly loaded by the following stage there is little need for build out R. The attraction of this circuit is executing a balanced input using only two opamps, so if we plan to budget using three opamps, we could just use a true instrumentation amp topology in the first place and gain higher input impedance, lower NF network resistance, etc. The true inst amp topology being more symmetrical and naturally balanced, would behave better at frequency extremes too. Note: There is an obscure and somewhat esoteric benefit from using opamps inverting, as input stage LTP CM issues are not exercised as strenuously. So this topology may deliver some unexpected benefit with lesser opamps, over even pure instrumentation topology.

Visualizing this circular feedback path is interesting. If you look at the -Vout node as an input to U1, assuming Vin + and - inputs are terminated to a low impedance, it will look like another + input to a unity gain non-inverting stage. So opamp U1 will try to make it's output node follow the voltage at -Vout (it's effective + input). This makes R5 and R6 appear in parallel as feedback to U2's - input helping it follow the U2 + input (noise). So while not very intuitive that noise will be coherent and common mode at the input and output of the U2 inverting stage, and cancel in a following differential. Of course this analysis ignores lag, feedback network poles, etc. making caps across R2 and R4 identical will maintain the unity gain relationship wrt -Vout. I vaguely recall some discussion about putting a cap across R5 = cap across R6. Of course this is not generally accepted practice, so I would keep these caps tiny, and make LPF poles across R2 and R4 dominant. Having some C across U2 helps U2 present a low impedance at HF to the outside world via the input and U1 feedback network. I always like to visualize some radio signal in input ports. Of course a another stage of passive LPF could be added in series with inputs terminated to actual ground, for robust RF rejection.

Since that following differential would add noise of it's own there are diminishing returns in adding a stage to cancel such a modest noise source.

have we beat this one to death yet?

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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by mediatechnology »

have we beat this one to death yet?
No. :D

I suppose I should show the A/D driver using it.
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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by hazmo »

Well, thanks for beating it, I never can't get enough of it :lol:.
They don't tell you stuff like that in lectures...


In the meantime I made a preliminary drawing for the preamp controlller. Since the plan is to have a remote preamp,
there will be one board that directly talks to the THAT5171s, and one board providing the hardware interface for the
user, both connected by I²C. Something like 50 meters or more will be possible with the bus drivers I want to use,
actual maximum distance depends on the environment. One set of boards will be able to control at least four preamps I
think, depending on the feature set of the user interface I haven't fully decided on yet, it might be up to eight. The
prototype will show.


[Schematic] [Layout]


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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by JR. »

Are the TL074 buffers needed? You can use a simple resistive pad to drop levels down to 3vp-p. I guess it's nice to isolate the audio sources. If the A/D inputs are multiplexed (they usually are) their S/H capture acquisition can talk back into the inputs, and settling time for the S/H will affect crosstalk/noise floor (jumping between a loud input and quiet one, means the sample cap has to slew to the new level before conversion will be accurate).

If you want to make the TL0's output impedance a little lower, use a small feedback cap across the feedback R. They are not generally low Z opamps open loop. If the audio is coming from any distance you can improve ground noise isolation by adding a couple resistors to make those inverting buffers into 4 resistor differential amps. I guess it depends on the resolution of the A/D, it might not matter if their dynamic range is very limited.

I have never tried to push serial com over that kind of distance. I had issues with SPI over inches when my clock edges were not clean and data would get corrupted, but you should be OK using a dedicated driver.

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Re: THAT 1570 1510 and 1512 Input/Output Circuits

Post by JR. »

I don't think he needs to go that far,,,he's probably just citing the driver data sheet numbers.

I2C and SPI are generally included in the firmware for popular micro's while i rolled my own SPI once to deal with circuit issues in one design.

When mixing digital poop with high performance audio poop, sometimes the digital noise can leak around through sundry paths. I ended up interleaving my SPI data rate with the A/D sampling interval to keep the noise floor under better control.

But every design is different.

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